1. Field of the Invention
The present invention relates to a semiconductor integrated circuit device. In particular, the present invention relates to a semiconductor integrated circuit device having a non-volatile semiconductor memory device.
2. Description of the Related Art
In a non-volatile semiconductor memory device, for example, a NAND flash memory, reading and writing are carried out in units of pages (e.g., 2 KB) while erasing is carried out in units of blocks (e.g., 128 KB). As described above, the erase unit is larger than the write unit in the NAND flash memory. An overwrite operation in a flash memory will be described below.
An overwrite is carried out with respect to a page included in a logical block “a”.
Data of the logical block “a” is held in a physical block (actual memory addresses) “A” in a flash memory space. In order to carry out an overwrite with respect to the flash memory, data stored in the overwrite page must be erased once. Moreover, in a NAND flash memory, data of the entire physical block including the page is erased in addition to the page. For this reason, the following operation is carried out.
A spare block (physical block) “B” is prepared. The spare block B is in an already erased state, and does not correspond to any logical blocks. All pages of the physical block “A” including the page having a write request are copied (in this case, data of the page to be overwritten is updated). Thereafter, the block including the old data is erased. The foregoing operation is carried out, and thereby, the data of the logical block “a” is held in the physical block B, and not the physical block “A”.
In order to enable access, the flash memory prepares an address correspondence table (mapping table) of logical blocks and physical blocks. This technique is disclosed in JPN. PAT. APPLN. KOKAI Publications No. 10-124384 and No. 11-110283. More specifically, logical address/physical address conversion is carried out. In the conversion, a logical address/physical address conversion table, that is, a mapping table is used. Conversion means for converting a logical address into a physical address has a function of outputting a physical block address for a logical block address input. For example, if a logical block “a” is input, before the foregoing overwrite operation, a physical address corresponding to the physical block “A” is output. On the other hand, after the overwrite operation, an address corresponding to the physical block B is output. In the manner described above, access is made with respect to memory.
Conventionally, an SRAM is used for the logical address/physical address conversion. However, if an SRAM is used, an SRAM sense amplifier and control circuit for controlling the SRAM are required.
Moreover, a logical address decoder for decoding the logical address is required to access the SRAM. In addition, a physical address decoder for decoding the physical address output from the SRAM is required to access the flash memory. Thus, if the SRAM is integrated with a flash memory chip, an address decoder and address bus are required.